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| Compare | Image | Name | Manufacturer | Pricing(USD) | Quantity | Weight(Kg) | Size(LxWxH) | Part Status | Series | Mounting Type | Operating Temperature | Packaging | Moisture Sensitivity Level (MSL) | Technology | Height Seated (Max) | RoHS Status | Published | Datasheet | Package / Case | Length | Width | Number of Terminations | Additional Feature | Reach Compliance Code | HTS Code | Number of Functions | JESD-609 Code | Terminal Finish | Surface Mount | Terminal Position | Terminal Form | Peak Reflow Temperature (Cel) | Supply Voltage | Terminal Pitch | Base Part Number | Pin Count | Time@Peak Reflow Temperature-Max (s) | Subcategory | Output Polarity | Power Supplies | Qualification Status | JESD-30 Code | Family | Number of Bits | Load Capacitance | Number of Inputs | Output Characteristics | Trigger Type | fmax-Min | Logic Type | Propagation Delay (tpd) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| SSTUH32866EC/G,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32866ecg518-datasheets-4321.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | unknown | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTUH32866 | 96 | 30 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | ||||||||||||||
| SSTUH32865ET/G,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32865etg551-datasheets-4304.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.65mm | 74SSTUH32865 | 160 | 30 | COMPLEMENTARY | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||||||
| SSTUH32865ET,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32865etg551-datasheets-4304.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.65mm | 74SSTUH32865 | 160 | COMPLEMENTARY | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||||||||
| SSTV16857CGT | Renesas Electronics America |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | 74SSTV | Surface Mount | -40°C~85°C | Tape & Reel (TR) | 1 (Unlimited) | Non-RoHS Compliant | /files/renesaselectronicsamericainc-sstv16857cg-datasheets-3979.pdf | 48-TFSOP (0.240, 6.10mm Width) | 2.3V~2.7V | 74SSTV16857 | 14 | Registered Buffer with SSTL_2 Compatible I/O for DDR | ||||||||||||||||||||||||||||||||||
| SSTUH32864EC,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32864ec551-datasheets-4320.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.8mm | 74SSTUH32864 | 96 | COMPLEMENTARY | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Configurable Registered Buffer | 1.8 ns | |||||||||||||||
| SSTUH32866EC,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32866ecg518-datasheets-4321.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | unknown | 8542.39.00.01 | 1 | e0 | Tin/Lead (Sn/Pb) | YES | BOTTOM | BALL | 240 | 1.7V~1.9V | 0.8mm | 74SSTUH32866 | 96 | 20 | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | |||||||||
| SSTUH32865ET,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32865etg551-datasheets-4304.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.65mm | 74SSTUH32865 | 160 | COMPLEMENTARY | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||||||||
| SSTUH32866EC,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32866ecg518-datasheets-4321.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | unknown | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.8mm | 74SSTUH32866 | 96 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | ||||||||||||||||
| SSTUH32865ET/G,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32865etg551-datasheets-4304.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.65mm | 74SSTUH32865 | 160 | 30 | Other Logic ICs | COMPLEMENTARY | 1.8V | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||||
| SSTUH32865ET,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32865etg551-datasheets-4304.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | e0 | Tin/Lead (Sn/Pb) | YES | BOTTOM | BALL | 240 | 1.7V~1.9V | 0.65mm | 74SSTUH32865 | 160 | 20 | Other Logic ICs | COMPLEMENTARY | 1.8V | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||
| SSTUH32864EC/G,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32864ec551-datasheets-4320.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTUH32864 | 96 | 30 | Other Logic ICs | COMPLEMENTARY | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Configurable Registered Buffer | 1.8 ns | |||||||||||
| SSTU32864EC/G,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 2 (1 Year) | 1.5mm | ROHS3 Compliant | 2004 | /files/nxpusainc-sstu32864ec551-datasheets-4282.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 14 BIT 1:2 CONFIGURATION ALSO POSSIBLE | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTU32864 | 96 | 30 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer | 2 ns | ||||||||||||||
| SSTUA32S865ET,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | 1.2mm | ROHS3 Compliant | 2007 | /files/nxpusainc-sstua32s865etg55-datasheets-4293.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~2V | 0.65mm | 74SSTUA32S865 | 160 | TRUE | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | ||||||||||||||||
| SSTUH32864EC/G,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32864ec551-datasheets-4320.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTUH32864 | 96 | 30 | COMPLEMENTARY | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Configurable Registered Buffer | 1.8 ns | |||||||||||||
| SSTUH32866EC/G,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32866ecg518-datasheets-4321.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | unknown | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTUH32866 | 96 | 30 | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | |||||||||||
| SSTUA32866EC/G,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2007 | /files/nxpusainc-sstua32866ecg551-datasheets-4269.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | e1 | TIN SILVER COPPER | YES | BOTTOM | BALL | 260 | 1.7V~2V | 0.8mm | 74SSTUA32866 | 96 | 30 | Other Logic ICs | COMPLEMENTARY | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | |||||||||
| SSTUA32864EC,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | 1.5mm | ROHS3 Compliant | 2007 | /files/nxpusainc-sstua32864ecg557-datasheets-3120.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~2V | 0.8mm | 74SSTUA32864 | 96 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer | 1.8 ns | |||||||||||||||||
| SSTUH32864EC,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32864ec551-datasheets-4320.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.8mm | 74SSTUH32864 | 96 | COMPLEMENTARY | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Configurable Registered Buffer | 1.8 ns | |||||||||||||||
| SSTU32866EC/G,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2004 | /files/nxpusainc-sstu32866ecg551-datasheets-4261.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 14 BIT 1:2 CONFIGURATION ALSO POSSIBLE | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTU32866 | 96 | 30 | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | ||||||||||
| SSTUH32866EC/G,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 3 (168 Hours) | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32866ecg518-datasheets-4321.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | unknown | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTUH32866 | 96 | 30 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | ||||||||||||||
| HEF4007UBP,652 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | 4000B | Through Hole | -55°C~125°C | Tube | 1 (Unlimited) | CMOS | 4.2mm | ROHS3 Compliant | 1998 | /files/nxpusainc-hef4007ubp652-datasheets-4297.pdf | 14-DIP (0.300, 7.62mm) | 19.025mm | 7.62mm | 14 | 3 | e4 | NICKEL PALLADIUM GOLD | NO | DUAL | 260 | 3V~18V | 2.54mm | 4007 | 14 | 30 | Not Qualified | R-PDIP-T14 | 4000/14000/40000 | 3 | 50pF | 1 | Complementary Pair Plus Inverter | 80 ns | |||||||||||||
| SSTUH32866EC,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32866ecg518-datasheets-4321.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | unknown | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.8mm | 74SSTUH32866 | 96 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | ||||||||||||||||
| SSTU32866EC,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 2 (1 Year) | 1.5mm | ROHS3 Compliant | 2004 | /files/nxpusainc-sstu32866ecg551-datasheets-4261.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 14 BIT 1:2 CONFIGURATION ALSO POSSIBLE | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 1.7V~1.9V | 0.8mm | 74SSTU32866 | 96 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | |||||||||||||||
| SSTUA32S865ET/G,55 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2007 | /files/nxpusainc-sstua32s865etg55-datasheets-4293.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~2V | 0.65mm | 74SSTUA32S865 | 160 | 40 | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||||
| SSTU32866EC,557 | NXP USA Inc. |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2004 | /files/nxpusainc-sstu32866ecg551-datasheets-4261.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 14 BIT 1:2 CONFIGURATION ALSO POSSIBLE | 8542.39.00.01 | 1 | e0 | Tin/Lead (Sn/Pb) | YES | BOTTOM | BALL | 240 | 1.7V~1.9V | 0.8mm | 74SSTU32866 | 96 | 20 | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer with Parity | 1.8 ns | ||||||||
| SSTUH32864EC,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.5mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32864ec551-datasheets-4320.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 8542.39.00.01 | 1 | e0 | Tin/Lead (Sn/Pb) | YES | BOTTOM | BALL | 240 | 1.7V~1.9V | 0.8mm | 74SSTUH32864 | 96 | 20 | Other Logic ICs | COMPLEMENTARY | 1.8V | Not Qualified | R-PBGA-B96 | 25, 14 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Configurable Registered Buffer | 1.8 ns | |||||||||
| SSTUA32S865ET,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2007 | /files/nxpusainc-sstua32s865etg55-datasheets-4293.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | e0 | Tin/Lead (Sn/Pb) | YES | BOTTOM | BALL | NOT SPECIFIED | 1.7V~2V | 0.65mm | 74SSTUA32S865 | 160 | NOT SPECIFIED | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||
| SSTUH32865ET/G,551 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2005 | /files/nxpusainc-sstuh32865etg551-datasheets-4304.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.65mm | 74SSTUH32865 | 160 | 30 | COMPLEMENTARY | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 450 MHz | 1:2 Registered Buffer with Parity | 1.8 ns | |||||||||||||
| SSTU32865ET,557 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tray | 3 (168 Hours) | CMOS | 1.2mm | ROHS3 Compliant | 2004 | /files/nxpusainc-sstu32865etg518-datasheets-3069.pdf | 160-TFBGA | 13mm | 9mm | 160 | 8542.39.00.01 | 1 | e0 | Tin/Lead (Sn/Pb) | YES | BOTTOM | BALL | 240 | 1.7V~1.9V | 0.65mm | 74SSTU32865 | 160 | 20 | Other Logic ICs | TRUE | 1.8V | Not Qualified | R-PBGA-B160 | 28 | OPEN-DRAIN | POSITIVE EDGE | 270 MHz | 1:2 Registered Buffer with Parity | 2.15 ns | |||||||||
| SSTU32864EC/G,518 | NXP Semiconductors |
Min: 1 Mult: 1 |
0 | 0x0x0 | download | Surface Mount | 0°C~70°C | Tape & Reel (TR) | 2 (1 Year) | 1.5mm | ROHS3 Compliant | 2004 | /files/nxpusainc-sstu32864ec551-datasheets-4282.pdf | 96-LFBGA | 13.5mm | 5.5mm | 96 | 14 BIT 1:2 CONFIGURATION ALSO POSSIBLE | 8542.39.00.01 | 1 | YES | BOTTOM | BALL | 260 | 1.7V~1.9V | 0.8mm | 74SSTU32864 | 96 | 30 | TRUE | Not Qualified | R-PBGA-B96 | 25, 14 | POSITIVE EDGE | 450 MHz | 1:1, 1:2 Configurable Registered Buffer | 2 ns |
